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5M570ZM100I5N

  • In Stock: 100
  • Available: 7727

Reference Price(In US Dollars)

QtyUnit PriceExt.Price
1+US $129.60000US $129.60
10+US $100.80000US $1008.00
30+US $86.40000US $2592.00
100+US $79.20000US $7920.00
500+US $76.32000US $38160.00
1000+US $72.00000US $72000.00

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  • Description
  • Alternatives
  • Shopping Guide
Description
Description
The MAX V family of low cost and low power CPLDs offer more density and I/Os per footprint versus other CPLDs. Ranging in density from 40 to 2,210 logic elements (LEs) (32 to 1,700 equivalent macrocells) and up to 271 I/Os, MAX V devices provide programmable solutions for applications such as I/O expansion, bus and protocol bridging, power monitoring and control, FPGA configuration, and analog IC interface.  
Features
• Low-cost, low-power, and non-volatile CPLD architecture
• Instant-on (0.5 ms or less) configuration time
• Standby current as low as 25 µA and fast power-down/reset operation
• Fast propagation delay and clock-to-output times
• Internal oscillator
• Emulated RSDS output support with a data rate of up to 200 Mbps
• Emulated LVDS output support with a data rate of up to 304 Mbps
• Four global clocks with two clocks available per logic array block (LAB)
• User flash memory block up to 8 Kbits for non-volatile storage with up to 1000 read/write cycles
• Single 1.8-V external supply for device core
• MultiVolt I/O interface supporting 3.3-V, 2.5-V, 1.8-V, 1.5-V, and 1.2-V logic levels
• Bus-friendly architecture including programmable slew rate, drive strength, bus-hold, and programmable pull-up resistors
• Schmitt triggers enabling noise tolerant inputs (programmable per pin)
Alternatives

Functional Equivalent (FE) materials, including Fused Filament Fabrication (FFF) form, assembly, and functionally compatible substitute materials.

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