LMS3655MQRNLTQ1

The LMS12 is a high-speed 12 x 12-bit combinatorial multiplier integrated with a 26-bit adder in a single 84-pin package. It is an ideal building block for the implementation of very highspeed FIR filters for video, RADAR, and other similar applications.
The LMS12 implements the general form (A
•B) + C. As a result, it is also useful in implementing polynomial approximations to transcendental functions.
FEATURES❑ 12 x 12-bit Multiplier with Pipelined 26-bit Output Summer❑ Summer has 26-bit Input Port Fully Independent from Multiplier Inputs❑ Cascadable to Form Video Rate FIR Filter with 3-bit Headroom❑ A, B, and C Input Registers Separately Enabled for Maximum Flexibility❑ 28 MHz Data Rate for FIR Filtering Applications❑ High Speed, Low Power CMOS Technology❑ 84-pin PLCC, J-Lead