ADP3209CJCPZ-RL

GENERAL
The ADP320 200 mA triple output LDO combines high PSRR, low noise, low quiescent current, and low dropout voltage in a voltage regulator ideally suited for wireless applications with demanding performance and board space requirements.
The low quiescent current, low dropout voltage, and wide input voltage range of the ADP320 triple LDO extend the battery life of portable devices.
The ADP320 triple LDO maintains power supply rejection greater than 60 dB for frequencies as high as 100 kHz while operating with a low headroom voltage.
The ADP320 triple LDO offers much lower noise performance than competing LDOs without the need for a noise bypass capacitor.
FEATURES Bias voltage range (VBIAS): 2.5 V to 5.5 V LDO input voltage range (VIN1/VIN2, VIN3): 1.8 V to 5.5 V Three 200 mA low dropout voltage regulators 16-lead, 3 mm × 3 mm LFCSP Initial accuracy: ±1% Stable with 1 µF ceramic output capacitors No noise bypass capacitor required 3 independent logic controlled enables Over current and thermal protection Key specifications High PSRR 76 dB PSRR up to 1 kHz 70 dB PSRR 10 kHz 60 dB PSRR at 100 kHz 40 dB PSRR at 1 MHz Low output noise 24 µV rms typical output noise at VOUT = 1.2 V 43 µV rms typical output noise at VOUT = 2.8 V Excellent transient response Low dropout voltage: 110 mV @ 200 mA load 85 µA typical ground current at no load, all LDOs enabled 100 µs fast turn-on circuit Guaranteed 200 mA output current per regulator −40°C to +125°C junction temperatureAPPLICATIONS Mobile phones Digital cameras and audio devices Portable and battery-powered equipment Portable medical devices Post dc-to-dc regulation