AGL1000V2-FG144
- Manufacturer's Part No.:AGL1000V2-FG144
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- Series:IGLOO
- Description:IC FPGA 97 I/O 144FBGA
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- Available: 9589
Reference Price(In US Dollars)
Qty | Unit Price | Ext.Price |
---|---|---|
1+ | US $0.00000 | US $0.00 |
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- Description
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- Shopping Guide
The IGLOO family of flash FPGAs, based on a 130-nm flash process, offers the lowest power FPGA, a single-chip solution, small footprint packages, reprogrammability, and an abundance of advanced features.
Features and BenefitsLow Power
• 1.2 V to 1.5 V Core Voltage Support for Low Power
• Supports Single-Voltage System Operation
• 5 µW Power Consumption in Flash
*Freeze Mode
• Low Power Active FPGA Operation
• Flash
*Freeze Technology Enables Ultra-Low Power Consumption while Maintaining FPGA Content
• Easy Entry to / Exit from Ultra-Low Power Flash
*Freeze ModeHigh Capacity
• 15K to 1 Million System Gates
• Up to 144 Kbits of True Dual-Port SRAM
• Up to 300 User I/OsReprogrammable Flash Technology
• 130-nm, 7-Layer Metal, Flash-Based CMOS Process
• Instant On Level 0 Support
• Single-Chip Solution
• Retains Programmed Design When Powered Off
• 250 MHz (1.5 V systems) and 160 MHz (1.2 V systems) System PerformanceIn-System Programming (ISP) and Security
• ISP Using On-Chip 128-Bit Advanced Encryption Standard (AES) Decryption (except ARM®-enabled IGLOO® devices) via JTAG (IEEE 1532–compliant)†
• FlashLock® Designed to Secure FPGA ContentsHigh-Performance Routing Hierarchy
• Segmented, Hierarchical Routing and Clock StructureAdvanced I/O
• 700 Mbps DDR, LVDS-Capable I/Os (AGL250 and above)
• 1.2 V, 1.5 V, 1.8 V, 2.5 V, and 3.3 V Mixed-Voltage Operation
• Bank-Selectable I/O Voltages—up to 4 Banks per Chip
• Single-Ended I/O Standards: LVTTL, LVCMOS 3.3 V / 2.5 V / 1.8 V / 1.5 V / 1.2 V, 3.3 V PCI / 3.3 V PCI-X†, and LVCMOS 2.5 V / 5.0 V Input†
• Differential I/O Standards: LVPECL, LVDS, B-LVDS, and MLVDS (AGL250 and above)
• Wide Range Power Supply Voltage Support per JESD8-B, Allowing I/Os to Operate from 2.7 V to 3.6 V
• Wide Range Power Supply Voltage Support per JESD8-12, Allowing I/Os to Operate from 1.14 V to 1.575 V
• I/O Registers on Input, Output, and Enable Paths
• Hot-Swappable and Cold-Sparing I/Os‡
• Programmable Output Slew Rate† and Drive Strength
• Weak Pull-Up/-Down
• IEEE 1149.1 (JTAG) Boundary Scan Test
• Pin-Compatible Packages across the IGLOO FamilyClock Conditioning Circuit (CCC) and PLL†
• Six CCC Blocks, One with an Integrated PLL
• Configurable Phase Shift, Multiply/Divide, Delay Capabilities, and External Feedback
• Wide Input Frequency Range (1.5 MHz up to 250 MHz)Embedded Memory
• 1 kbit of FlashROM User Nonvolatile Memory
• SRAMs and FIFOs with Variable-Aspect-Ratio 4,608-Bit† RAM Blocks (×1, ×2, ×4, ×9, and ×18 organizations)
• True Dual-Port SRAM (except ×18)†ARM Processor Support in IGLOO FPGAs
• M1 IGLOO Devices—Cortex™-M1 Soft Processor Available with or without Debug
Functional Equivalent (FE) materials, including Fused Filament Fabrication (FFF) form, assembly, and functionally compatible substitute materials.
SHIPPING GUIDE
Shipping Methods
Rest assured that your orders will be handled by these trusted providers, such as DHL, FedEx, SF, and UPS.
Shipping Cost
Shipping starts at $40 but varies for destinations like South Africa, Brazil, India, and more. The actual shipping charges depend on time zone, country, and package weight/volume.
Delivery Time
We ship orders once daily, around 5 p.m., except on Sundays. The estimated delivery time may vary depending on the courier service you choose, but typically ranges from 5 to 7 business days.
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