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CDCS503PW

  • Available: 600

Reference Price(In US Dollars)

QtyUnit PriceExt.Price
1+US $2.83500US $2.84
10+US $1.89000US $18.90
30+US $1.41750US $42.53
100+US $1.13400US $113.40
500+US $1.03950US $519.75
1000+US $0.94500US $945.00

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  • Description
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Description

The HD74CDCV857 is a high-performance, low-skew, low-jitter, phase locked loop clock driver. It is specifically designed for use with DDR (Double Data Rate) synchronous DRAMs.
Features
• Supports 60 MHz to 200 MHz operation range
• Distributes one differential clock input pair to ten differential clock outputs pairs
• Supports spread spectrum clock requirements meeting the PC100 SDRAM registered DIMM specification
• External feedback pins (FBIN, FBIN) are used to synchronize the outputs to the clock input
• Supports 2.5V analog supply voltage (AVCC), and 2.5 V VDDQ
• No external RC network required
• Sleep mode detection
• 48pin TSSOP (Thin Shrink Small Outline Package)
Alternatives

Functional Equivalent (FE) materials, including Fused Filament Fabrication (FFF) form, assembly, and functionally compatible substitute materials.

SHIPPING GUIDE

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  • Shipping Cost

    Shipping starts at $40 but varies for destinations like South Africa, Brazil, India, and more. The actual shipping charges depend on time zone, country, and package weight/volume.

  • Delivery Time

    We ship orders once daily, around 5 p.m., except on Sundays. The estimated delivery time may vary depending on the courier service you choose, but typically ranges from 5 to 7 business days.

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