LM3S8971-IQC50-A2
- Manufacturer's Part No.:LM3S8971-IQC50-A2
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- Series:Stellaris® ARM® Cortex®-M3S 8000
- Description:IC MCU 32BIT 256KB FLASH 100LQFP
- Quantity:RFQAdd to RFQ List
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- In Stock: 50
- Available: 3322
Reference Price(In US Dollars)
Qty | Unit Price | Ext.Price |
---|---|---|
1+ | US $87.00000 | US $87.00 |
10+ | US $65.25000 | US $652.50 |
30+ | US $56.55000 | US $1696.50 |
100+ | US $50.02500 | US $5002.50 |
500+ | US $46.98000 | US $23490.00 |
1000+ | US $43.50000 | US $43500.00 |
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- Description
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- Shopping Guide
The Luminary Micro Stellaris® family of microcontrollers—the first ARM® Cortex™-M3 based controllers—brings high-performance 32-bit computing to cost-sensitive embedded microcontroller applications.
These pioneering parts deliver customers 32-bit performance at a cost equivalent to legacy 8- and 16-bit devices, all in a package with a small footprint.
Features
The LM3S817 microcontroller includes the following product features:
• 32-Bit RISC Performance
– 32-bit ARM® Cortex™-M3 v7M architecture optimized for small-footprint embedded applications
– System timer (SysTick) provides a simple, 24-bit clear-on-write, decrementing, wrap-on-zero counter with a flexible control mechanism
– Thumb®-compatible Thumb-2-only instruction set processor core for high code density
– 50-MHz operation
– Hardware-division and single-cycle-multiplication
– Integrated Nested Vectored Interrupt Controller (NVIC) providing deterministic interrupt handling
– 26 interrupts with eight priority levels
– Memory protection unit (MPU) provides a privileged mode for protected operating system functionality
– Unaligned data access, enabling data to be efficiently packed into memory
– Atomic bit manipulation (bit-banding) delivers maximum memory utilization and streamlined peripheral control
• Internal Memory
– 64-KB single-cycle flash
• User-managed flash block protection on a 2-KB block basis
• User-managed flash data programming
• User-defined and managed flash-protection block
– 8-KB single-cycle SRAM
• General-Purpose Timers
– Three timers, each of which can be configured: as a single 32-bit timer, as two 16-bit timers, or to initiate an ADC event
– 32-bit Timer modes:
• Programmable one-shot timer
• Programmable periodic timer
• Real-Time Clock when using an external 32.768-KHz clock as the input
• User-enabled stalling in periodic and one-shot mode when the controller asserts the CPU Halt flag during debug
• ADC event trigger
– 16-bit Timer modes:
• General-purpose timer function with an 8-bit prescaler
• Programmable one-shot timer
• Programmable periodic timer
• User-enabled stalling when the controller asserts CPU Halt flag during debug
• ADC event trigger
– 16-bit Input Capture modes:
• Input edge count capture
• Input edge time capture
– 16-bit PWM mode:
• Simple PWM mode with software-programmable output inversion of the PWM signal
• ARM FiRM-compliant Watchdog Timer
– 32-bit down counter with a programmable load register
– Separate watchdog clock with an enable
– Programmable interrupt generation logic with interrupt masking
– Lock register protection from runaway software
– Reset generation logic with an enable/disable
– User-enabled stalling when the controller asserts the CPU Halt flag during debug
• Synchronous Serial Interface (SSI)
– Master or slave operation
– Programmable clock bit rate and prescale
– Separate transmit and receive FIFOs, 16 bits wide, 8 locations deep
– Programmable interface operation for Freescale SPI, MICROWIRE, or Texas Instruments synchronous serial interfaces
– Programmable data frame size from 4 to 16 bits
– Internal loopback test mode for diagnostic/debug testing
• UART
– Two fully programmable 16C550-type UARTs
– Separate 16x8 transmit (TX) and 16x12 receive (RX) FIFOs to reduce CPU interrupt service loading
– Programmable baud-rate generator with fractional divider
– Programmable FIFO length, including 1-byte deep operation providing conventional double-buffered interface
– FIFO trigger levels of 1/8, 1/4, 1/2, 3/4, and 7/8
– Standard asynchronous communication bits for start, stop, and parity
– False-start-bit detection
– Line-break generation and detection(Continue ...)
Functional Equivalent (FE) materials, including Fused Filament Fabrication (FFF) form, assembly, and functionally compatible substitute materials.
SHIPPING GUIDE
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Shipping Cost
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Delivery Time
We ship orders once daily, around 5 p.m., except on Sundays. The estimated delivery time may vary depending on the courier service you choose, but typically ranges from 5 to 7 business days.
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