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NB6L239MNR2

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Description

Features
The NB6L239 is a high−speed, low skew clock divider with two divider circuits, each having selectable clock divide ratios; ÷1/2/4/8 and ÷2/4/8/16. Both divider circuits drive a pair of differential LVPECL outputs. (More device information on page 7).
• Maximum Clock Input Frequency, 3.0 GHz
• Input Compatibility with LVDS/LVPECL/CML/HSTL
• Rise/Fall Time 70 ps Typical
• < 10 ps Typical Output−to−Output Skew
• Ex. 622 MHz Input Generates 38.8 MHz to 622 MHz Outputs
• Internal 50 Ω Termination Provided
• Random Clock Jitter < 1 ps RMS
• Divide−by−1 Edge of QA Aligned to QB Divided Output
• Operating Range: VCC = 2.375 V to 3.465 V with VEE = 0 V
• Master Reset for Synchronization of Multiple Chips
• VBBAC Reference Output
• Synchronous Output Enable/Disable
Alternatives

Functional Equivalent (FE) materials, including Fused Filament Fabrication (FFF) form, assembly, and functionally compatible substitute materials.

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