PCM56P-K

PGA112AIDGSRG4 Description
The PGA112AIDGSRG4 devices (binary and scope gains) offer two analog inputs, a three-pin SPI interface, and software shutdown in a 10-pin, VSSOP package. This PGA112AIDGSRG4 provides internal calibration channels for system-level calibration.
The channels are tied to GND, 0.9 V(CAL), 0.1 V(CAL), and V(REF), respectively. V(CAL) an external voltage connected to Channel 0, is used as the system calibration reference. PGA112AIDGSRG4
Features
• Rail-to-Rail Input and Output 
• Offset: 25 μV (Typical), 100 μV (Maximum)
• Zerø Drift: 0.35 μV/°C (Typical), 1.2 μV/°C(Maximum)
• Low Noise: 12 nV/√Hz
• Input Offset Current: ±5 nA Maximum (25°C)
• Gain Error: 0.1% Maximum (G ≤ 32), 0.3% Maximum (G > 32)
• Binary Gains: 1, 2, 4, 8, 16, 32, 64, 128 (PGA112, PGA116)
• Scope Gains: 1, 2, 5, 10, 20, 50, 100, 200 
• Gain Switching Time: 200 ns
• 2 Channel MUX: PGA112, PGA113 
• Four Internal Calibration Channels
• Amplifier Optimized for Driving CDAC ADCs
• Output Swing: 50 mV to Supply Rails
• AVDD and DVDD for Mixed Voltage Systems
• Software and Hardware Shutdown: IQ ≤ 4 μA 
• Temperature Range: –40°C to 125°C
• SPI™ Interface (10 MHz) With Daisy-Chain Capability PGA112AIDGSRG4 Applications
• Remote e-Meter Reading
• Automatic Gain Control
• Portable Data Acquisition
• PC-Based Signal Acquisition Systems
• Test and Measurement