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PEB2256H-V12
- Manufacturer's Part No.:PEB2256H-V12
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- Description:IC FRAMER LINE 3.3V 80MQFP
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- Available: 2462
Reference Price(In US Dollars)
| Qty | Unit Price | Ext.Price |
|---|---|---|
| 1+ | US $0.00000 | US $0.00 |
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- Description
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- Shopping Guide
The Primary Rate Access Clock Generator and Transceiver PRACT (PEB 22320) is a monolithic CMOS device which implements the analog receive and transmit line interface functions to primary rate PCM carriers. It may be programmed or hard wired to operate in 1.544-Mbit/s (T1) or 2.048-Mbit/s (CEPT) carrier systems.
Features
• ISDN line interface for 1544 and 2048 kbit/s (T1 and CEPT)
• Data and clock recovery
• Transparent to ternary codes
• Low transmitter output impedance for a high return loss with reasonable protection resistors (CCITT G.703 requirements for the line input return loss fulfilled)
• Adaptively controlled receiver threshold
• Programmable pulse shape for T1 applications
• Jitter specifications of CCITT I.431 and BELLCORE TR-NWT-000499 publications met
• Wander and jitter attenuation
• Jitter tolerance of receiver: 0.5 UI s
• Implements local and remote loops for diagnostic purposes
• Monolithic line driver for a minimum of external components
• Low power, reliable CMOS technology
• Loss of signal indication for receiver
• Clock generator for system clocks
Functional Equivalent (FE) materials, including Fused Filament Fabrication (FFF) form, assembly, and functionally compatible substitute materials.
SHIPPING GUIDE
Shipping Methods
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Shipping Cost
Shipping starts at $40 but varies for destinations like South Africa, Brazil, India, and more. The actual shipping charges depend on time zone, country, and package weight/volume.
Delivery Time
We ship orders once daily, around 5 p.m., except on Sundays. The estimated delivery time may vary depending on the courier service you choose, but typically ranges from 5 to 7 business days.
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