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TL750L12CLP

  • Available: 2500

Reference Price(In US Dollars)

QtyUnit PriceExt.Price
1+US $1.37400US $1.37
10+US $0.91600US $9.16
30+US $0.68700US $20.61
100+US $0.54960US $54.96
500+US $0.50380US $251.90
1000+US $0.45800US $458.00

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  • Description
  • Alternatives
  • Shopping Guide
Description
GENERAL
The K4S560432D is 268,435,456 bits synchronous high data rate Dynamic RAM organized as 4 x 16,785,216 words by 4bits, fabricated with SAMSUNG's high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system applications.
FEATURES
• JEDEC standard 3.3V power supply
• LVTTL compatible with multiplexed address
• Four banks operation
• MRS cycle with address key programs -. CAS latency (2 & 3) -. Burst length (1, 2, 4, 8 & Full page) -. Burst type (Sequential & Interleave)
• All inputs are sampled at the positive going edge of the system clock.
• Burst read single-bit write operation
• DQM for masking
• Auto & self refresh
• 64ms refresh period (8K Cycle)
Alternatives

Functional Equivalent (FE) materials, including Fused Filament Fabrication (FFF) form, assembly, and functionally compatible substitute materials.

SHIPPING GUIDE

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