EPM570T100C3N

EPM570T100C3N Description Altera's EPM570T100C3N is of the CPLD type and there are several different types of PLDs (Programmable Logic Devices) such as FPGAs, CPLDs, and SPLDs.
The main difference between these devices is the circuit complexity and the number of available logic cells.
The EPM family is based on a 0.18-micron, 6-layer metal flash process with densities of 240 to 2,210 logic elements (LEs) (128 to 2,210 equivalent macrocells) and 8 Kb of non-volatile memory available for purchase on the Kynix Electronics website.   EPM570T100C3N
Features Low-cost, low-power CPLD
• Instant-on, non-volatile architecture
• Standby current as low as 25 µA
• Provides fast propagation delay and clock-to-output times
• Provides four global clocks with two clocks available per logic array block (LAB)
• UFM block up to 8 Kbits for non-volatile storage
• MultiVolt core enabling external supply voltages to the device of either3.3 V/2.5 V or 1.8 V
• MultiVolt I/O interface supporting 3.3-V, 2.5-V, 1.8-V, and 1.5-V logic levels
•Bus-friendly architecture including programmable slew rate, drive strength,bus-hold, and programmable pull-up resistors
• Schmitt triggers enabling noise tolerant inputs (programmable per pin)
•I/Os are fully compliant with the Peripheral Component Interconnect SpecialInterest Group (PCI SIG) PCI Local Bus Specification, Revision 2.2 for 3.3-Voperation at 66 MHz
• Supports hot-socketing
• Built-in Joint Test Action Group (JTAG) boundary-scan test (BST) circuitrycompliant with IEEE Std. 1149.1-1990
• ISP circuitry compliant with IEEE Std. 1532   EPM570T100C3N Applications
• Enable the server to work properly with external I/O modules, such as keyboards, monitors, and mice
• FPGAs and other programmable systems
• Custom state machines in digital systems.
• Address decoders
• Safety-critical control applications